Bascom Hunter develops firmware for a variety of applications from simple interfaces to complex algorithms. Our experienced team has delivered solutions with FPGA/SoC families and their respective tool chains. We can work with you to implement the FPGA/SoC functions and features for your specific application, whether it involves low-bandwidth customized serial interfaces, high-bandwidth SERDES interfaces, or complex signal-processing algorithms. We code RTL in Verilog and/or VHDL, and simulate the RTL in Modelsim as well as device native-tool simulators. For complex algorithms and where possible, we implement bit-accurate simulation environments to validate the RTL implementation against the original (Matlab, C, Python, etc) software model. We are Select Tier Partners with AMD/Xilinx and members of the Intel/Altera Partner Program.
Digital Intermediate Frequency Interoperability (DIFI) is an important feature to many of our customers. DIFI (or IEEE 4900) enables products to communicate RF data over ethernet packets. This reduces the need for A/D and D/A converters to sit on each product just to send RF data between them. While previous standards for Digital IF or Digital RF existed (VITA 49) it did not provide the constraints needed for true interoperability.